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Timing

CS2501

Fractional-N Clock Multiplier

CS2501 Overview

The CS2501 is a system-clocking device incorporating a programmable phase-locked loop (PLL). The hybrid analog/ digital PLL architecture comprises a delta-sigma fractional-N analog PLL and a digital frequency-locked loop (FLL). The CS2501 enables clock generation from a stable timing reference clock. The device can generate low-jitter clocks from a noisy clock reference at frequencies as low as 50 Hz. An internal oscillator can provide the timing reference clock, enabling a reduction in external component requirements. The CS2501 can be configured using a control interface supporting I2C and SPI modes of operation. The CS2501 can be powered from a single 1.8 V or 3.3 V supply. The device combines high performance with low power consumption. The CS2501 is available in commercial-grade 10-pin TSSOP package for operation from –40°C to +85°C. The device is also available in the AEC-Q100-qualified grade-2 package for operation from –40°C to +105°C.

Product Features

  • High-performance analog/digital phase locked loop

  • Fractional clock multiplier and jitter reduction using hybrid analog/digital PLL

    • Generates low-jitter 6–75 MHz clock (CLK_OUT), synchronized to a 50 Hz–30 MHz low-quality or intermittent frequency reference (CLK_IN)

  • Flexible timing reference source

    • External clock, external crystal or built-in oscillator

  • Great performance

    • High resolution PLL ratio (1 PPM)

    • 18 psRMS period jitter

    • 18 psRMS period jitter with internal reference

  • Glitchless clock output generated from intermittent input

  • I2C/SPI control port

  • Configurable auxiliary clock/status output

  • Minimal board space required

    • No external analog loop-filter components

  • Pin-to-pin, register map, and control compatible with CS2100 and CS2300

  • Single-supply operation at 1.8 V or 3.3 V

Parametric Specifications

Package10L-TSSOP
Host InterfaceYes
Clock Multiplier / Jitter RemovalYes
Frequency Synth / Clock GeneratorNo
Output Frequency Range (MHz)6-75
Reference Frequency Range (MHz)8-75
Power Supply (V)1.8-3.3
One-Time ProgrammableNo

Design Resources

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Evaluation Boards

  • Hazelburn System (CDB-CLOCKING)

    Hazelburn System (CDB-CLOCKING)

    The Hazelburn system (CDB-CLOCKING-MB with daughter cards) is the development platform for the Cirrus Logic high-performance clocking devices CS2500, CS2501 and CS2600. It supports clock inputs and clock outputs and allows configuration and programming for a variety of possible use cases. This board provides all clock I/O connectors, control switches, power supplies and control-interface hardware.

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