CS2500 Overview
Product Features
High-performance analog/digital phase locked loop
Clock frequency synthesizer incorporating delta-sigma fractional-N analog PLL
Generates low-jitter 6–75 MHz clock (CLK_OUT) from 8–75 MHz timing reference (REF_CLK_IN)
Fractional clock multiplier and jitter reduction using hybrid analog/digital PLL
Generates low-jitter 6–75 MHz clock (CLK_OUT), synchronized to a 150 Hz–30 MHz low-quality or intermittent frequency reference (CLK_IN)
Flexible timing reference source
External clock or external crystal
Great performance
High resolution PLL ratio (1 PPM)
18 psRMS period jitter
Glitchless clock output generated from intermittent input
I2C/SPI control port
Configurable auxiliary clock/status output
Minimal board space required
No external analog loop-filter components
Pin-to-pin, register map, and control compatible with CS2000 and CS2200
Single-supply operation at 1.8 V or 3.3 V
Parametric Specifications
| Package | 10L-TSSOP |
| Host Interface | Yes |
| Clock Multiplier / Jitter Removal | Yes |
| Frequency Synth / Clock Generator | Yes |
| Output Frequency Range (MHz) | 6-75 |
| Reference Frequency Range (MHz) | 8-75 |
| Power Supply (V) | 1.8-3.3 |
| One-Time Programmable | No |